1. Field of the Invention
The present invention relates to a plasma display panel driving circuit and a plasma display apparatus used for wall-mounted televisions and large-size monitors.
2. Related Art
An AC drive surface discharge type panel, typically represented by a plasma display panel (hereinafter, abbreviated as “PDP”), has a structure in which a number of discharge cells are formed between a front face plate and a back face plate that are disposed face to face with each other. On the front face plate, a plurality of pairs of display electrodes, each pair constituted by a scan electrode and a sustain electrode, are formed on a front face glass substrate in parallel with each other, and a dielectric layer and a protective layer are formed in a manner so as to cover the paired display electrodes. On the back face plate, a plurality of data electrodes that are in parallel with each other are formed on a back face glass substrate, and a dielectric layer that covers these is formed, and a plurality of partition walls are further formed thereon in parallel with the data electrodes, with phosphor layers being formed on the surface of the dielectric layer and the side faces of each partition wall. Moreover, the front face plate and the back face plate are disposed face to face with each other, and tightly sealed in such a manner that the paired display electrodes and the data electrodes intersect with each other three dimensionally. The inner discharge space is filled with a discharge gas containing xenon. Here, a discharge cell is formed at a portion at which the paired display electrodes and data electrode are made face to face with each other is formed.
In the panel having this structure, ultraviolet rays are generated by a gas discharge in each discharge cell, and the phosphors of the respective colors of red (R), green (G) and blue (B) are excited by the ultraviolet rays to emit light rays so that a color displaying process is carried out. Moreover, the panel carries out gray-scale displaying processes through a sub-field method, that is, processes in which one field period is divided into a plurality of sub-fields and gray-scale display is achieved based upon combinations of sub-fields to be emitted. Each sub-field have a reset period, an address period and a sustain period. During the reset period, a reset discharge is generated to generate a wall charge required for the succeeding address operation on each electrode. During the address period, an address discharge is generated selectively in the discharge cell to be emitted, in order to form a wall charge. Moreover, during the sustain period, a sustain pulse is alternately applied to a scan electrode and a sustain electrode which compose a display electrode pair so that a sustain discharge is caused in the discharge cell in which the address discharge is caused. Thus, the phosphor layer of the corresponding discharge cell emits light, and an image displaying process is carried out. In this manner, in order to display image data, respectively different signal waveforms are applied to the respective electrodes depending on the reset period, the address period and the sustain period.
Since driving voltage waveforms that are different for the respective periods in the sub-field and the respective electrodes are generated, a plasma display apparatus having such a panel has a driving circuit including a plurality of constant voltage power supplies having different output voltages and a number of parts such as switching elements and capacitors. There have been strong demands for simplifying the structure of such a driving circuit.
For simplifying the structure of the driving circuit, the following technique has been proposed. That is, a voltage doubler circuit which can output a voltage of integral multiple of a reference voltage is provided in the driving circuit, and also switching elements included in the voltage doubler circuit are compatibly used as other switching elements prepared for controlling the application of a driving pulse voltage to the electrodes (for example, see JP-A-2005-70598).
FIG. 8 is a circuit diagram of the driving circuit described in the above-mentioned prior art. The driving circuit includes a constant voltage generating circuit including a sustain pulse generating circuit, a reset waveform generating circuit and a voltage doubler. In the constant voltage generating circuit, the voltage doubler circuit generates a voltage of integral multiple of a voltage of a constant voltage power supply included in the sustain pulse generating circuit, and a regulator 55 converts the voltage to a voltage required for the reset waveform generating circuit to output the converted voltage. With this arrangement, it becomes possible to omit the constant voltage power supply in the reset waveform generating circuit.
It is a rare case that in a plasma display apparatus, regarding a constant voltage power supply used for a certain driving circuit, another constant voltage power supply having a voltage of integral multiple of the voltage of the constant voltage power supply is used for another driving circuit. For example, the voltage of a constant voltage power supply to be used in a reset waveform generating circuit that generates a reset waveform in the reset period is normally set to about 2.5 times the voltage (Vs) of the constant voltage power supply to be used in a sustain pulse generating circuit for generating a sustain pulse during the sustain period. For example, in the example of FIG. 8, a voltage of 2 Vs is generated from a voltage of Vs by a voltage multiplying circuit 56, and a voltage of 1.5 Vs is generated from the voltage of 2 Vs by a regulator 55, and thereafter, a voltage of 2.5 Vs is generated by a diode D5 and a capacitor C3.
Therefore, in the above-mentioned prior art, it is not possible to take a desired voltage of decimal multiple of the reference voltage only by the voltage doubler circuit which can output a voltage of integral multiple of the reference voltage. Thus it is necessary to generate once a voltage which is higher than a desired voltage and is a voltage of integral multiple of the reference voltage by the voltage doubler circuit and convert the generated voltage to be the desired voltage (voltage of decimal multiple) by the regulator. Therefore, even when the constant voltage power supply can be omitted, a regulator is required together with a voltage doubler, and thus it is not possible to sufficiently reduce the number of elements composing the driving circuit.